1. Field of the Invention
The present invention relates to electronic switches. In particular, the present invention relates to semiconductor switches, including those formed of one or more metal-oxide-semiconductor field effect transistors (MOSFET). More particularly, the present invention relates to semiconductor switches capable of switching at relatively high frequencies, including those frequencies above about one gigahertz.
2. Description of the Prior Art
Developments in semiconductor technology have created the capability to produce low-cost, highly reliable switches that are, effectively, implementations of mechanical relays. They have been found to be of particular use, when implemented, as single pole, single throw, type relays, but are not limited thereto. Semiconductor switches are being used more and more as replacements for the prior mechanical relays, due to the high switching speed available as well as their ability to transfer relatively high currents without failure. These switches are often referred to as transfer gates or pass transistors as they employ the characteristics of transistorsxe2x80x94usually MOS transistorsxe2x80x94to either permit or prevent the passage of a signal.
It is well known that switches are widely used in many fields. They are used in all variety of large- and small-scale consumer products, including, but not limited to, automobiles and home electronics. They can be and are used as analog routers, gates, and relays. They are used as digital multiplexers, routers, and gates as well.
A generic P-type MOS transistor switch is shown in FIG. 1. The switch is essentially PMOS transistor M1 having a source coupled to node A and a drain coupled to node B for the purpose of regulating signal transmission between nodes A and B. The control gate of switch M1 is enabled by way of a coupling to enable-signal-input node EN from external control circuitry. EN is commonly coupled to the gate of M1 by way of an inverter chain including one or more pairs of inverters such as inverters IV1 and IV2. Inverters IV1 and IV2 are powered by a high-potential power rail identified as Vcc and a low-potential power rail identified as GND. The bulk of the switch transistor is coupled to the high-potential power rail. In operation, a logic LOW applied at EN propagates through the inverter chain to turn on M1, thereby allowing a signal to pass between nodes A and B, whether from A to B or from B to A. A logic HIGH at EN turns M1 off, thereby blocking signal propagation between nodes A and B.
For illustration purposes in order to advance the discussion of the present invention, line resistances R1 and R2 are shown, as are parasitic capacitances C1, C2, and C3. Resistances R1 and R2 represent the impedances associated with circuitry coupled to the transistor switch circuit. That impedance may be of some expected value; for example, in certain applications, resistances R1 and R2 are generally on the order of about 50 ohms. However, it is important to note that the present invention is not limited to any specific load impedances associated with external circuitry.
Continuing the discussion regarding FIG. 1, capacitance C1 represents the impedance associated with the gate-to-source interface of the transistor structure, capacitance C2 represents the impedance associated with the drain-to-gate interface of the transistor structure, and capacitance C3 represents the impedance associated with the gate-to-bulk interface (typically a gate oxide layer) of the transistor structure. It is to be noted that an N-type MOS transistor may be employed to perform a complimentary same switching function as that provided by PMOS transistor M1, with appropriate modifications in the inverter chain and the coupling of the bulk of the transistor to GND instead of Vcc, and bearing in mind certain differences understood by those skilled in the art in regard to NMOS and PMOS transistors.
MOS transistors are desirable in that they consume very little power to operate. As fabrication techniques have advanced, the supply potentials and switching speeds at which such structures can operate effectively have improved. Nevertheless, it has been determined that most silicon MOS transistor switches configured in the manner shown in FIG. 1 have significant difficulty in propagating signals between A and B when such signals exceed transmission frequencies on the order of 400 MHz. It may appear to be possible to improve this characteristic by reducing the size of M1; however, there is an undesirable trade-off involving an increase in the on-resistance of the transistor. Apart from an overall interest in keeping transistor on resistances low, the net result when evaluating the transfer function of the structure may be little or no gain in frequency performance.
An analysis of the impedances of the switch transistor shown in FIG. 1 leads to an understanding of the propagation frequency limitation associated with that device. Specifically, as the transmission signal propagation frequency exceeds 300 MHz, for example, the impedances associated with the characteristic of the system identified simply by resistances R1 and R2, and the gate-coupled capacitances C1, C2, and C3 begin to dominate the transfer function. As a result, at such a frequency and higher, a shunt or short is established between the transistor""s bulk coupled to Vcc and GND (through inverter IV2 that enables M1). The dominating impedance at such frequencies causes an unacceptable attenuation of the signal to be passed. As earlier noted, this cannot be resolved by reducing the gate size of M1 as that drives up the drain-source resistance undesirably.
For most computing applications, the frequency limitations of MOS transistor switches are of little concern. However, as the drive for increased operating bandwidth capabilities grows, such as in the video transmission field for example, there is a greater need for MOS transistor switches that can pass relatively higher frequency transmissions with minimal losses. Therefore, what is needed is a semiconductor circuit that acts as a switch for digital and analog operations. What is also needed is a semiconductor switch circuit that is operable as a transfer gate or pass gate over an array of expected supply potentials. Further, what is needed is a MOSFET-based switch circuit capable of propagating relatively high frequency signals with minimal attenuation. What is further needed is such a switch circuit that propagates high-frequency transmissions with minimal effect on the on-resistance associated with the transistor circuit.
It is an object of the present invention to provide a semiconductor circuit that acts as a switch for digital and analog operations. It is also an object of the present invention to provide a semiconductor switch that is a transfer gate or pass gate operable for a broad range of supply potentials. It is a further object of the present invention to provide a MOSFET-based switch circuit capable of propagating relatively high frequency signals with minimal attenuation. Another object of the present invention is to provide such a switch circuit that propagates high-frequency transmissions with minimal effect on the on-resistance associated with the MOSFET-based passgate structure.
These and other objectives are achieved in the present invention by increasing the impedance of the shunting pathway associated with the existing MOSFET structure used to establish the pass gate. Specifically, an impedance element, such as a resistive device, a capacitive device, or a combination thereof, is coupled between the gate of the pass gate transistor and a supply rail. The impedance element serves to decouple the pass gate transistor""s gate from the supply rail that determines the gate potential. Additionally, such an impedance element may be coupled between the bulk of the pass gate transistor and the supply rail to which the bulk is coupled, again, to decouple that portion of the pass gate transistor from that particular supply rail. For a PMOS transistor, the bulk is ordinarily coupled directly to the high-potential rail, and for an NMOS transistor, the bulk is ordinarily coupled to the low-potential rail. It has been determined that for a conventional MOS transistor structure employed as the pass gate transistor, an impedance that is greater than the impedance of the system is preferable to at least double the substantially un attenuated signal frequency that may propagate through the circuit of the present invention. Of course, the particular impedance employed may be selected as a function of the particular characteristics of the pass gate, the operating frequencies of interest, and the anticipated load on the circuit, among other factors. Additionally, it is to be noted that any nonzero impedance supplement will improve the response performance of the switch.
The impedance element of the present invention is coupled in series with the parasitic capacitance pathways of the pass gate transistor so as to increase the overall impedance of those pathways. As a result, the prior shunt that those capacitance pathways established is substantially negated, particularly under those conditions where propagation of higher frequencies is of interest. In all other respects the pass gate transistor circuit of the present invention permits signal transmission as expected for conventional complementary MOS (CMOS) switch devices.
The present invention is suitable for use in a wide array of applications in which high-frequency switching is of interest. On the most fundamental level, pass gate circuits effect the propagation of individual signals from one location to another. Ganged together, they can operate to propagate vast sets of signals in order to create data transmission systems that generate outcomes of increasing complexity. On a basic level, pass gate circuits may be used to form buses and backplanes that are interconnecting devices designed to enable the propagation of signals among discrete devices. Local or internal buses provide signal paths for propagation within a discrete device, such as a microprocessor. Types of local buses included in microprocessor systems include ISA, EISA, Micro Channel, VL-bus and PC1 bus. Examples of buses to connect peripheral systems, such as printers, keyboards, and the like, include NuBus, TURBOchannel, VMEbus, MULTIBUS and STD bus. Each such type of signal transmission system can operate only as effectively as the components used to create it. Improved pass gate circuits such as that of the present invention may be employed in any such bus, as well as backplane structures used to interconnect printed circuit boards, to increase propagation rates. For video and graphics signal transmissions, including for flat screen panels in particular, interfaces such as Low Voltage Differential Signaling (LVDS), Transmission Minimized Differential Signaling (TMDS), A synchronous Transfer Mode (ATM), and Digital Visual Interface (DVI) are designed to enable such transmissions. The present invention establishes the type of transmission bandwidth required for such interface standards.
Increased propagation rates are of particular interest for the rapid transfer of dense data packets. Improved routers used to forward data packets from one location to another rely increasingly upon switch circuitry to enhance data transfer through local and wide area networks. This is particularly the case for high quality video, graphics, data, and voice transmissions passed by wire, optical and wireless connections. The routers are used to control the flow of signal traffic among devices and are dependent upon recognition of a variety of signal transmission protocols. Such protocols include, but are not limited to, IP, IPX, AppleTalk, DECnet. Improved switching circuitry such as the circuit of the present invention, facilitates and enhances the operation of such signal routers. Of course, the present invention is suitable for use in any computing system, such as personal computers, personal digital devices, telecommunications devices, and other electronic systems requiring rapid high quality signal propagation.
These and other advantages of the present invention will become apparent upon review of the following detailed description of the embodiments of the invention, the accompanying drawings, and the appended claims.